Minimising snubbers for high-current emitter-switched transistors

High-power emitter-switched transistors have been operated at 20 kHz and 80 A off 600 V, using voltage clamps instead of shunt snubbers. Under these conditions, snubbing is the dominant source of switching-related power loss and transistors deadtime. An analysis of series snubbers reveals configurations conducive to minimal reset-time and power-loss. Cascode switches operating at high-current ideally require adaptive voltage-clamps which clip at current-dependent voltage levels; practical realizations of such clamps are given.<<ETX>>


INTRODUCTION
Emitter-switching high-voltage power transistors permits safe turn-off with reverse base-current equal to or greater than the collector current.Consequently, lower storage and crossover times are possible than with base-switched transistors, and the dispersion in turn-off performance arising from production tolerance in characteristics and variance in operating junction-temperature is reduced, because high reverse base-current rather than minority-carrier recombination predominates in removing stored charge [ l ] .Emitter switching is also reported to extend the RBSOA up to the Vcbo rating, effectively giving an increase in Vceo rating with no loss in hfeIc product: normally a higher Vceo rating is achieved at the expense of hfeIc product [2] which is proportional to Vceo exp(-2.3).These benefits have generally been observed and applied to low-current transistors operating at or below 20 A .However, high-voltage, 20 A transistor performance has recently been improved [2,3] using planar fabrication technology more akin to that of MOSFETs which enables more precise semiconductor processing and the fabrication of finer emitter geometries and structures.These devices are reported to be characterised by reduced dispersion in specifications between devices, enhanced RBSOA by greater uniformity of current density over the die area, and reduced storage and crossover times from increased accessibility to stored charge.It therefore seems that at the 20 A current-level most of the emitter-switch benefits have been eroded if not eclipsed and the disadvantage of the cascode, increased drive complexity, higher onstate losses, and sparse history of application, weigh less favourably in comparison.In contrast, large-area transistors (> 10 x 10 nun) constructed using power-thyristor fabrication and packaging techniques, with Vceo and IC ratings of 1000 V, 300 A and 700 V, 450 A at 150 C [5] are less likely to be superceeded by parallel-connected, highly interdigitated planar transistors (the reasoning i s similar as that for MOSFETs).When emitter switched with parallel-connected 50 V MOSFET's, large-area transistors are suited to high-frequency (20-50 kHz) power conversion at medium-power levels above 50kW.A start to the commercial exploitation of high-current emitterswitched transistors has been made [ 6 ] with the launch of an isolated power-hybrid, comprising 2 split 1000 V, 100 A cascode switches with inverseparallel diodes.Like base-switched transistors, optimum cascode-switch performance is dependent on the method of base-current control in the forward direction.Emitter switching does not eliminate the need for the profiled current-source, normally used in low-gain single-transistor operation, and offer the user a voltage-control input.The optimum drive of high-current cascode switches has been investigated [71.This paper presents the switching waveforms obtained during switching 80 A from 600 V at 20 kHz, the turn-off protection networks employed, and their contribution to net power-loss; and contrasts this with the remaining high series-snubber power-loss.Linear seriessnubbers and voltage-clamp based reset circuits are analysed to determine which generates the least power-loss and transistor dead-time.Also, methods of improving supply-referenced voltage clamps, which uphold the transistors Vceo rating at high collector-current, are analysed.

CASCODE SWITCH CIRCUIT
Cascode-switch performance has been observed with circuit fig. 1. Series snubber Ls sets turn-on di/dt; soft voltage-clamp Dc, Cc and Rc, holds turn-off Vce below Vceo.R s operated with Cs, damps the resonant circuit, comprising transistor output capacitance, clamp-loop stray inductance and Cc; and Cm prevents MOSFET avalanching during emitter/base current-commutation and collectorvoltage rise.Secondary effects of Cm and Cs, RS are the aiding of base-emitter junction cut-off, at the start of storage-time and during collectorvoltage rise.Fig. 2 gives turn-off measurements for a MEDL DT47-1050 transistor operating in Fig. 1.Turn-off crossover-time is approximately 13011s for k = 1 (ie.Vce = 1 to 1.3 V) and lOOns for k = 2 (ie.Vce = 1.2 to 1.5 V).Transistor output capacitance (approx.2.0nF above 400V) PESC '88 RECORD (APRIL 1988) CH 2523-9/88/0000-0797 $1.00 0 1988 IEEE causes an increase in trv at low-current.The transistor is held out of saturation by a shuntregulator anti-saturation circuit which only requires connection of a 1 A, 1000 V diode to the collector; thereby preventing diode reverserecovery influencing transistor turn-off.

CASCODE SWITCH WAVEFORMS
Cascode-switch operation is shown in fig. 3 to 8. Features of these are described briefly before analysis of their implications to circuit design.The reverse base-current during storage-time, fig.5, comprises components of collector and reverse emitter current.Early in the storagetime, after Ib reaches IC, Cm is discharged by the recovery of the emitter junction and produces the current peak.A later effect is avalanching of the emitter junction, at approximately 15 V by stray base-clamp loop-inductance (40nH) which is manifested as a linear fall in base-current after the collector-current fall.Base-clamp loop inductance also controls the initial rate-of-rise of reverse base-current.Fig. 3 gives the expanded current-fall and voltage-rise at turn-off.Collector-base junction recovery is virtually complete at 350 V and the subsequent voltage rise is controlled by transistor output-capacitance and Rs, Cs.Fig. 6 shows the improvement in storage and crossover time given by an antisaturation circuit.
Here both waveforms are triggered by the emitter-MOSFET turn-off edge, lOOns into the trace.The effect of the antisaturation circuit on Vce and its response are shown in fig. 4. Fig. 7 gives the turn-off waveforms at 80 A, but waveform pairs are not synchronised.Fig. 6 and 7 also show the poorer performance of the voltage clamp at higher dildt, 2000-4500 A/us.Two parasitic effects contribute to initial voltage-overshoot: clamp-diode forward recovery and voltage-clamp loop stray-inductance.Overshoot in fig.6 is largely due to the diode forward-recovery effect.At twice the dildt, fig.6bI Vfr has increased, but the high-frequency oscillation shows that stray clamp-inductance is dropping a higher voltage to excite its associated resonant circuit.At higher dildt, fig.7, the stray-inductance component of overshoot is more pronounced.However, clamp-diode forward-recovery remains discernable as an exponentially decaying voltage component (tfr = 200n.s).Transistor desaturation (60V) is evident at turn-on in fig.8, during the current-rise.Freewheel-diode reverserecovery current is 50 A for an 80 A forward current: di/dt was 200A/us.Finally series-snubber reset into the voltage-clamp is seen in fig.8.

SWITCHING POWER-LOSS
The main component of turn-off power-loss is produced by current-voltage crossover.The nonlinear voltage waveform is assumed to approximate an exponential in the derivation of [l].
trv and tfi are measured between 10% points.Extrapolating the curves of fig. 2 allows turn-off power-loss estimation for 100 A, 2OkHz and 600 V operation, as 63 W. Turn-off time measurements were made at 21 C. The increase with temperature requires investigation.However, with baseswitched large-area transistors, factors of 2 to 3.5 have been obtained [lo] between 25 and 150 C.Even if a worst-case loss of 200 W is assumed, this energy is 2.5 to 5 times down on the seriessnubber reset-energy, fig.9.A 100 A 3-phase cascode-switch inverter with 5uH snubbers would have snubber-reset losses of 750W and turn-off switching losses between 126 and 400W at low fundamental output-frequencies.Improvement in power-conversion efficiency would result from energy recovery of trapped series-snubber energy.However, in this paper only an analysis of seriessnubber configurations is performed to minimise trapped energy, and to identify other criteria for series-snubber selection.

SERIES SNUBBER COMPARISON
High-voltage transistors suffer from delay in moving from linear operation to hard saturation which is manifested by a higher on-state voltagetail after voltage-fall.Large area high-voltage transistors additionally have a lateral chargespreading time, akin to thyristors.Therefore, even without reverse-recovery charge in freewheeldiodes, series snubbers would be essential, to prevent severe desaturation up to the dc-rail at turn-on, when the transistor area undergoing conduction would be ill-defined.In overcoming this, accepting a higher dildt during load current increase than during diode recovery in principle offers a saving in stored energy.For example: Peak transistor collector-current, Ip = 175 A Continuous collector-current used, IC = 100 A So, peak diode-reverse-current,   L1 is required to be 5 to 10 times Ls to prevent significantly reducing the effective seriessnubber inductance at transistor turn-on, when L1 operates in parallel with Ls.For the same initial control of di/dt, Ls is increased by k.

Ls kLs = modified value with L1 in parallel
= original value of series-snubber ( 5 ) Reset-energy of Ls is therefore increased by k.At turn-on, energy associated with lowering Vcc, before freewheel-diode recovery peak, is stored in Ls by virtue of its larger value.At transistor turn-off when stray inductance charges Cc above the Edc, transformer operation is reversed and Cc is discharged into the Ls reset-circuit, providing T1 does not saturate.The equivalent reset-loop of Cc is given in fig.lOb.While no additional switches are used in this voltage-droop circuit, another reset-circuit is required for Ls; and to make this non-dissipative would likely require switches.Therefore, the potential to rapidly discharge a small capacitor during current rise.Thereby placing less constraint on minimum ontime, must be weighed against increased circuit complexity, higher trapped-energy at turn-off, more complicated design procedure and greater influence of parasitic effects on voltage-droop magnitude because of the smaller capacitor, when considering use of 10b.In the absence of other methods of discharging Cc to Edc, 10b serves to show the simplicity of loa.

SOFT VOLTAGE CLAMP DESIGN
In the emitter-switch test circuit, fig. 1, a series-snubber is integrated with a soft voltageclamp, which dissipates energy in a resistor connected to the dc-rail.An analysis of this and other discharge circuits has been conducted for performance comparison, especially of seriessnubber reset-time for a given voltage overshoot.Fig. 11 shows the integrated series-snubber resetcircuit and soft voltage-clamp with a generalised discharge circuit,  15 enable comparison of voltage-clamp discharge circuits, and show the nature of change in parameters versus seriessnubber inductance.Snubber inductance is thus seen to limit conversion-efficiency and minimum on and off times, and therefore maximum average output-voltage or maximum switching frequency.CONCLUSIONS a) Series snubber power-loss dominates in highfrequency phase-legs with switches capable of square load-line turn-off.Power-loss from the reset of trapped-energy cannot be significantly reduced by choice of series-snubber circuit.Based on other criteria some series snubbers are better suited to high-frequency power-conversion.b) Capacitor-based voltage-clamps may be precisely designed to satisfy a given peak-voltage and inductor reset-time.An optimum Q near 0,866 has been identified for the commonly used voltageclamp, with a discharge resistor to Edc. c) Emitter-switched transistors require adaptable voltage clamps to hold collector-voltage below Vceo at high current without impracticable layout, or complex compensated voltage-clamps.Emitter switching gives low current-fall at turn off.The resulting overshoot on the transistor collector is difficult to clamp given the forward-recovery time of simple practical voltage clamps.
. The main function of the voltage clamp is to hold turn-off Vce below Vceo, under all operating conditions.Being able to use the voltage-clamp to clip the diode voltage at the peak of reverse-recovery and to reset the series snubber, or to take series-snubber energy until a bulk reset-circuit begins to act, are added benefits.Series-snubber circuits 12A(b) and 12B may be eliminated.In each, the voltage-clamp operates in series with a freewheel-diode, giving 2 series forward-recovery effects at the onset of clamp operation.Also, obtaining a low transistor/ voltage-clamp loop-inductance would be difficult, particularly in all phase-legs of 12A(b).The transistors, freewheel-diodes and voltage clamps of 12A(a) , D(a) and D(b) are connected directly to each other, giving good transistor protection.The disadvantage of 12E is the additional voltageclamps, although these are required in 12A(a) & D with shoot-through protection.One possible disadvantage of 12A(a) is the parallel operation of voltage clamps.Three voltage-clamps always act in parallel when absorbing Inn or Io related energy.This may be desirable during a fault condition, but it demands close matching of effective clamp-impedance seen by L, to prevent ringing between clamps and excessive power-loss by the clamp nearest L. The advantage in 12A of having a single series-snubber is therefore outweighed.In 12D the phase-leg inductor must reset in the local voltage-clamps.

802FIGFIG
FIG.10 ADAPTIVE SOFT VOLTAGE-CLAMPS by 11 and 17% per lOOV, but the main danger comes from the reduced margin between Vceo connection of the load across the dc-rail.However, except in 12C, the voltage-time integrals are all equal by time t6.12C is different because a proportion of the 1o.Irm.L component of energy, stored in L at t3, is dissipated in the transistor and diode.A longer reset-time of Inn-associated energy is also obtained with 12C.At high-current the recovery current would not fully reset during the on-time.Complete reset of the residual Irm and Io would occur in the voltage clamp at transistor turn-off.These disadvantages render 12C unsuitable for high-frequency operation.By forming an asymmetric half-bridge with it and adding inductor, Lst, circuit 12E is obtained.12E is the only configuration shown with added shootthrough protection.It is applicable to all circuits except 12D.Two additional voltage clamps per phase-leg, as shown in 12E, are required in 12A(a) and 12C.Shoot-through protection does not affect either Inn or Io reset energies or times.It appears, at this stage, that 12C is the only configuration which has undesirable energy-reset properties.A better Inn reset energy and time result in the rest.Other aspects of operation are now examined.A prerequisite of fast high-current switching with minimal snubbing is a very compact physical arrangement, especially of the transistor and voltage clamp, but also of freewheel-diode and voltage clamp if additional local clamps are to be avoided Edc -Vinitial ) / Edc .The maximum voltage rise on Cc at the highest collector-current sets Cc and Ls reset-time, and hence the minimum off-time.The maximum current rating of TC and Lc sets the Cc reset time.The minimum on-time corresponds to the time after current-zero in Lc, when Tc can block a forward voltage.Failure to turn off Tc results in loss of voltage-droop and excess dissipation in Tc.For the lowest dead times a fast thyristor is required.Energy is advantageously returned to Edc at a time when load-current is commutated between freewheel-diode and transistor.Cc then aids local dc-rail decoupling.In phase-legs, Cc is also required to absorb Irm related energy.Tc should be turned on by collector voltage-fall, which occurs at both transistor and diode turn on.A current-related voltage-droop is also produced at diode turn-off to conserve diode voltage rating.Adaptive voltage-clamp Fig.lObdissipates energy related to the Vcc rise above Edc; and also energy associated with voltage droop, less obviously in the Ls clamp.Phase-leg operation is possible.